Home » Software Implementation of Break-Up Algorithm for Logic Minimization

Software Implementation of Break-Up Algorithm for Logic Minimization

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Sahadev Roy

Dept. of ECE, NIT Arunachal Pradesh, India
sahadevroy@gmail.com

Koustuvmoni Bharadwaj

Dept. of ECE, NIT Arunachachal Pradesh, Yupia, India
email: koustuv_red@yahoo.in

 

Abstract

In this paper, we propose a robust technique to minimize multiple input digital circuits. This technique is simple and efficient to determine the minimum number of gates required to realize a multiple input digital circuit. Rather than using sizeable truth table for multiple input combinational circuits having at least one operation per minterms, proposed technique produced a minimal solution by breaking the minterms and arranging them in adjacent groups. This technique also overcomes the problems related to simplification using Karnaugh Map for more than four inputs system. Also we have proposed an algorithm to implement this technique in Java programming language and out provide results.

Keywords

Breakup Algorithm;
Java;
Logic Minimization;
Minterms;
Prime Implicants;
Prime Implicant Table

Cited as

Sahadev Roy and, Koustuvmoni Bharadwaj “Software Implementation of Break-Up Algorithm for Logic Minimization,” International Journal of Advanced Engineering and Management, vol. 2, no. 6, pp. 141-145,  2017. DOI: https://doi.org/10.24999/IJOAEM/02060034
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